Overview
This three-year PhD studentship is associated with an EPSRC-funded project on 'Fine-Grain Parallel Cellular Processor Arrays in 3D Silicon technologies". The student will work with state-of-the-art IC design and test equipment, researching the circuit and system architectures of devices implemented in emerging fabrication technologies that allow stacking of multiple silicon layers in a single device. In particular, design of "vision chips" will be considered. These devices integrate thousands of sensing and processing elements in a massively parallel fine-grain array configuration and provide a high-performance, low-power consumption alternative to conventional vision systems, with a range of applications from autonomous robots to retinal prostheses. The student will investigate the partitioning of processor architecture amongst multiple silicon layers and research circuit/layout design issues. A number of devices will be fabricated and tested during the project, using the latest 3D integration technologies based of Silicon on Insulator (SOI) and bulk CMOS wafers. The project involves international collaboration with partners in Finland and USA.
Eligibility
Candidates should have a degree in Electronics, Computer Engineering, or similar. Background knowledge of digital and analogue circuits and interest in hardware design is required. Some experience in VLSI design would be an advantage.
The project will be carried out in the Microelectronics Design Lab, School of Electrical and Electronics Engineering, The University of Manchester. The lab has recently moved to new accommodation, and is well equipped, with industry-standard EDA design tools and IC test equipment. The activities of the lab include adventurous research on novel computer architectures, cellular processor arrays, analogue and mixed-mode circuit design and brain-inspired VLSI systems. More information, including relevant publications, can be found on the lab research web page: http://personalpages.manchester.ac.uk/staff/p.dudek/
Value of this studentship
Successful UK/EU applicants will receive full funding for tuition fees and a stipend in the region of £13,000 per year, tax free. Non-UK/EU candidates will receive full funding for tuition fees, however, only a stipend of about £2,500 per year can be offered to such candidates. Please note that overseas students need to demonstrate maintenance funds in the region of £9,000 per year in order satisfy visa requirements, so they will need to obtain additional funding from other sources.
Enquiries
Enquiries should be directed to Dr. Piotr Dudek, School of EEE, p.dudek@manchester.ac.uk
Closing date for applications is 25 January 2010. The three year PhD project will start in April 2010.
How to apply
If you wish to apply please email a covering letter, full Curriculum Vitae and the names and contact details of at least two academic referees to Ms Marie B Davies
m.b.davies@manchester.ac.uk
Please kindly mention Scholarization.blogspot.com when applying for this studentship
This three-year PhD studentship is associated with an EPSRC-funded project on 'Fine-Grain Parallel Cellular Processor Arrays in 3D Silicon technologies". The student will work with state-of-the-art IC design and test equipment, researching the circuit and system architectures of devices implemented in emerging fabrication technologies that allow stacking of multiple silicon layers in a single device. In particular, design of "vision chips" will be considered. These devices integrate thousands of sensing and processing elements in a massively parallel fine-grain array configuration and provide a high-performance, low-power consumption alternative to conventional vision systems, with a range of applications from autonomous robots to retinal prostheses. The student will investigate the partitioning of processor architecture amongst multiple silicon layers and research circuit/layout design issues. A number of devices will be fabricated and tested during the project, using the latest 3D integration technologies based of Silicon on Insulator (SOI) and bulk CMOS wafers. The project involves international collaboration with partners in Finland and USA.
Eligibility
Candidates should have a degree in Electronics, Computer Engineering, or similar. Background knowledge of digital and analogue circuits and interest in hardware design is required. Some experience in VLSI design would be an advantage.
The project will be carried out in the Microelectronics Design Lab, School of Electrical and Electronics Engineering, The University of Manchester. The lab has recently moved to new accommodation, and is well equipped, with industry-standard EDA design tools and IC test equipment. The activities of the lab include adventurous research on novel computer architectures, cellular processor arrays, analogue and mixed-mode circuit design and brain-inspired VLSI systems. More information, including relevant publications, can be found on the lab research web page: http://personalpages.manchester.ac.uk/staff/p.dudek/
Value of this studentship
Successful UK/EU applicants will receive full funding for tuition fees and a stipend in the region of £13,000 per year, tax free. Non-UK/EU candidates will receive full funding for tuition fees, however, only a stipend of about £2,500 per year can be offered to such candidates. Please note that overseas students need to demonstrate maintenance funds in the region of £9,000 per year in order satisfy visa requirements, so they will need to obtain additional funding from other sources.
Enquiries
Enquiries should be directed to Dr. Piotr Dudek, School of EEE, p.dudek@manchester.ac.uk
Closing date for applications is 25 January 2010. The three year PhD project will start in April 2010.
How to apply
If you wish to apply please email a covering letter, full Curriculum Vitae and the names and contact details of at least two academic referees to Ms Marie B Davies
m.b.davies@manchester.ac.uk
Please kindly mention Scholarization.blogspot.com when applying for this studentship
0 comments:
Post a Comment